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VHDL (VHSIC Hardware Description Language) is a versatile and powerful hardware description language which is used for modeling electronic systems at different levels of design abstraction. It can be used to design the lowest level (gate level) to the highest level of a digital system. This language follows a set of rules and allows the designer to use varied design methods to provide different perspectives to the digital system.

Course Code: VHDLDSGN
Course Duration: 1 Month
Course objectives:

Our comprehensive course will give you an overview of the VHDL language and its use in logic designing. It has the following objectives:

  1. Introduces VHDL concepts and constructs
  2. Use of VHDL design units which include entities, architectures, packages and configurations.
  3. Describes VHDL applications to design digital hardware
  4. Describe VHDL design description with component declarations and instantiations
  5. Describes the concept of abstraction
  6. Explains VHDL syntax and coding styles
  7. Explains use of types, overloading and conversion functions
  8. How to build models using language constructs such as assignment, process statements, if statements, case statements and loops.
Delegates will be able to:
  1. Learn the basic components of VHDL model
  2. Know about VHDL constructs used in simulation and synthesis environments
  3. Know about delta delay concept
  4. Understand problematic issues in coding hardware
  5. Use of your VHDL simulation and synthesis tools
  6. Write VHDL hardware designs using coding practices
  7. Write functions and procedures
  8. Print messages in testbenches
  9. Write transaction based testbenches using subprograms
  10. Code for complex FPGA and ASICs
  11. Code hierarchical designs using VHDL libraries
  12. Write parameterized VHDL code by using generics and data types
  13. Gain a strong foundation in VHDL RTL and testbench coding techniques
Course Content
  1. VHDL Overview and Concepts
  2. Levels of Abstraction
  3. Entity, Architecture
  4. Data Types and declaration
  5. Enumerated Data Types
  6. Relational, Logical, Arithmetic Operators
  7. Signal and Variables, Constants
  8. Process Statement
  9. Concurrent Statements
  10. When-else, With-select
  11. Sequential Statement
  12. If-then-else, Case
  13. Slicing and Concatenation
  14. Loop Statements
  15. Delta Delay Concept
  16. Arrays, Memory Modeling, FSM
  17. Writing Procedures
  18. Writing Functions
  19. Behavioral / RTL Coding
  20. Operator Overloading
  21. Structural Coding
  22. Component declarations and instantiations
  23. Generate Statement
  24. Configuration Block
  25. Libraries, Standard packages
  26. Local and Global Declarations
  27. Package, Package body
  28. Writing Test Benches
  29. Assertion based verification
  30. Files read and write operations
  31. Code for complex FPGA and ASICs
  32. Generics and Generic maps

At our institute, students can attain an in-depth knowledge about VHDL and its uses in designing and verifying of digital hardware.